Shivaji University 2005 B.E Computer Science ADVANCED MICROPROCESSORS - exam paper
Sunday, 19 May 2013 09:45Web
H-491
THIRD YEAR OF COMPUTER SCIENCE AND ENGINEERING (PART-1) EXAMINATION, 2005
SHIVAJI UNIVERSITY, KOLHAPUR
ADVANCED MICROPROCESSORS
Day and Date: Monday, 27-11-2005 Total Marks: 100
Time: 10.00p.m. To 1.00p.m.
Instructions:
Instructions:
1) Solve any 3 ques. from SECTION-1
2) Solve any 3 ques. from SECTION-2
3) Figures to right shows full marks
SECTION-1
Q.1.
a) Draw 8086 CPU architecture and discuss.
b) With the help of 8086 minimum mode timing diagram discuss learn operation. [Marks 8]
Q.2
a) Explain working of subsequent pins of 8086
b) Test
c) BHE
d) LOCK
e) X1 andX2 [Marks 8]
b) What is REP prefix? elaborate the advantages of it in program execution? [Marks 8]
Q.3
a) Draw and discuss 8086 maximum mode configuration. [Marks 8]
b) What is kind 0 interrupting in 8086? Hoe 8086 responds when it is invoked? [Marks 8]
Q.4
a) Explain any five-assembler directives used in 8086 assembly language programming.
b) Write an 8086 assembly language program for block transfer of length 20 numbers from 6000H to 7000H
SECTION-2
Q. 5)
a) Draw an internal architecture of 80386 and discuss the operation of Barrel shifter adder. [Marks 8]
b) discuss memory addressing and interrupt processing in 808386 PVAM modes. [Marks 8]
Q.6)
a) Explain the paging operation of 808386 CPU?
b) discuss the various kinds of descriptor tables used in 808386 CPU. [Marks 8]
Q.7)
a) Draw and discuss the format for CALL gate descriptor in detail. [Marks 8]
b) How 80386 operate in real mode? discuss memory addressing interrupt processing in this mode [Marks 8]
Q.8) Write a short notes on (any three)
a) Demand paging and VMM
b) Privileged instructions of 80386
c) Page level protections
d) Virtual memory
Earning: Approval pending. |