Shivaji University 2005 B.E Computer Science ADVANCED MICROPROCESSORS - Question Paper

Y-368
THIRD YEAR OF COMPUTER SCIENCE AND ENGINEERING (PART-1) EXAMINATION, 2005
SHIVAJI UNIVERSITY, KOLHAPUR
ADVANCED MICROPROCESSORS

Day and Date: Monday, 8-5-2005 Total Marks: 100
Time: 10.00p.m. To 1.00p.m.

Instructions:

Instructions:
1) Solve any 3 ques. from SECTION-1
2) Solve any 3 ques. from SECTION-2
3) Figures to right shows full marks

SECTION-1

Q.1.
a) discuss various addressing modes of 8086 microprocessor with example. [Marks 8]

b) elaborate the advantages of segmentation? How 8086 microprocessor address memory segments explain? [Marks 8]

Q.2
a) With neat diagram discuss 8086 maximum mode configurations. [Marks 8]

b) Explain the system bus timing diagram for learn cycle in minimum mode configuration [Marks 8]

Q.3 discuss the subsequent instructions in detail

a) MOVSW
b) IDIV
c) CBW
d) IRET

b) explain interrupt structure of 80386. [Marks 8]


Q.4
a) Explain control word, operand pointer, and tag word of 8087. [Marks 8]

b) Convert provided numbers into short real formats [Marks 8]
a) 4.83*10-23
b) -7.54*10-28






SECTION-2

Q. 5)
a) How 80386 operate in real mode? discuss memory-addressing interrupt processing in this mode [Marks 8]

b) What is descriptor table? Draw LDT [Marks 8]

c) What are various kinds of registers of 80386? discuss them in detail. [Marks 8]



Q.6)
a) Draw and discuss data segment descriptor formats for 80386? [Marks 8]

b) CALL gate descriptor [Marks 8]

Q.7)
a) Explain operation of demand paging in 80386. [Marks 8]

b) What are 4 levels of protection in 80386 discuss privilege rule [Marks 8]

Q.8) Write a short notes on (any three)

a) Debug and test registers in 80386
b) Paging in 80386
c) 80386 flag registers
d) Virtual memory

Earning:   Approval pending.