Janardan Rai Nagar Rajasthan Vidyapeeth 2005 M.Tech Computer Science MSCI03-ELECTRONIC INSTRUMENTS AND SYSTEMS - Question Paper

MASTER OF TECHNOLOGY
(SEMESTER - IV) (ELECTICAL)
(SPL-1 : CONTROL & INSTRUMENTATION)


MSCI03-ELECTRONIC INSTRUMENTS AND SYSTEMS


TIME: 03 HOURS MAX. MARKS: 75

GENERAL INSTRUCTIONS:
1. Question paper is divided into 3 groups
2. Each group is of 25 marks every
3. Figure to the right in bracket shows mark
4. Assume suitable data if necessary

GROUP A: ans any 3 ques.. ques. No. one is compulsory.
Q.1: List the causes of failures. (05)
Q.2: What are the methods of identifying faults and the stages. (10)
Q.3: Write down the soldering procedure. (10)
Q.4: Explain the principle of PMMC multimeter. (10)
Q.5: What are the factors on which capacitance depends. (10)


GROUP B: ans any 3 ques.. ques. No. six is compulsory.
Q.6 What are the typical faults in rectifier and filter circuits. (05)
Q.7 discuss the principle of a frequency counter and discuss how it is used
for measurement of frequency and time period? (10)
Q.8 Explain the principle of operation of a Cathode Ray Oscilloscope. (10)
Differentiate ranging from the duel trace and duel beam oscilloscope
Q.9: What are logic family characteristics. Explain/Define every of
them. (10)
Q.10: Give the steps for measurement of load regulation. (10)






GROUP C: All ques. are Compulsory.
Q.11 Fill in the blanks (each ques. carries two marks)
(i) An op-amp has _________ voltage sources.
(ii) In an ideal op-amp, the open loop gain is ___________.
(iii) Inverting terminal is marked with minus sign. A high negative signal at it will make the output stuck at _________.
(iv) Typical voltage across a LED is ____________.
(v) The d.c. voltage at the collector will be ________ when RC is open.
Q.12 Multiple option ques.. (Each ques. carries two marks)
(i) PMMC uses cells for the measurement of ___________.
(a) Current (b) Voltage
(c) Resistance (d) Power
(ii) The bridge used for precision measurement of capacitance is __________.
(a) Owen’s bridge (b) Manwell bridge
(c) Hay’s bridge (d) Schering bridge
(iii) Time constant of a RC circuit is always _________.
(a) RC 2nd (b) R/C second
(c) C/R second (d) one second
(iv) For matching low impedance of the load with high impedance of the source which transformer is needed ____________.
(a) Step up (b) Step down
(c) (a) and (b) (d) not possible
(v) The main advantages of CMOS is __________.
(a) Very high gain (b) High current
(c) Low value gain (d) Very low dissipation

Q.13 True or false (each ques. carries one mark).
(i) 3 ½ digit meter triples the range.
(ii) Clock frequency is 1Hz and if one million pulses of the input signal pass through the AND gate in 1 clock pulse, the frequency of the input signal is 10 MHz
(iii) DC voltage can be connected to an electrolytic capacitor in any way.
(iv) In a low power FET, resistance ranging from drain and gate, or gate and source are equal.
(v) Although gain of an OP-amp in very high, it disegiminates ranging from the interference signal and the derived signal.

Earning:   Approval pending.