Janardan Rai Nagar Rajasthan Vidyapeeth 2007 B.Tech Electrical Engineering DIGITAL ELECTRONICS - Question Paper

BIT - III TOTAL PAGES:03
BACHELOR IN TECHNOLOGY
(SEMESTER - III) (AERONAUTICAL/COMPUTER/ELECTRICAL/ELECTRONICS & TELECOMM./)
BSAE4/BSCO4/BSE4/BSET4 – DIGITAL ELECTRONICS
TIME: 03 HOURS MAX. MARKS: 75

GENERAL INSTRUCTIONS:
1. Question paper is divided into 3 groups
2. Each group is of 25 marks every
3. Figure to the right in bracket shows mark
4. Assume suitable data if necessary

GROUP A: ans any 3 ques.. ques. No. one is compulsory.
Q.1 What is flip-flop? discuss R-S flip flop ? (05)
Q.2 Explain Gray code? discuss conversion of binary to gray code and gray to binary with examples. ? (10)
Q.3 Short note on Half adder ? (10)
Q.4 Write all gates and discuss any 2 gates in detail ? (10)
Q.5 Short note on (10)
a) Exclusive-NOR gate.
b) NAND gate
c) NOT gate
GROUP B: ans any 3 ques.. ques. No. six is compulsory.

Q.6 Short note on full adder ? (05)
Q.7 Prove that the largest 4-digit octal number when subtracted from the larger 3- digit hexadecimal number yields zero in decimal ? (10)
Q.8 Briefly discuss why a ripple counter’s maximum usable clock frequency reduces as more flip-flops are added to the counter to increase its MOD-number why is maximum usable clock frequency in case of a synchronous counter independent of clock frequency ? (10)
Q.9 Convert (10)
a) (176.F)16 to Decimal.
b) (110011)2 to Hexadecimal
c) (19.25)10 to binary.
Q.10. elaborate registers? discuss shift register ? (10)




GROUP C: All ques. are Compulsory.
Q.11 Fill in the blanks (each ques. carries two marks)
(i) Adding (24)16 to (FE1)16 produces ____________
(ii) A ______________ is a digital function that produces the arithmetic sum
of 2 binary numbers in parallel .
(v) The __________ MOS conducts when its gate to source voltage is
positive
(iv) x+xy =_____________ and F, F =_____
(v) Data selectors are basically the identical as ______________
Q.12 Multiple option ques.. (Each ques. carries two marks)
(i) ASC11 is
(a) American standard code of info institution
(b) American standardized convert international info
(c) American standardized converten info institution
(d)American standard code of info intercharge
(ii) SOP is
(a) Standard of product
(b) Standard of pass
(c) Sum of product
(d) Sum of pass
(iii) D flipflop stands for
(a) Delay FF
(b) Data FF
(c) Decay FF
(d) Del FF
(iv) AND logic is
(b) Subtraction logic
(c) Addition logic
(d) Multiplication logic
(e) Division logic
(v) Standard SOP form consist of
(a) Min term
(b) Max term
(c) Multiple terms
(d)Minimized terms

Q.13 True or false (each ques. carries one mark).
(i) NOR gate is universal gate
(ii) RAM is random access memory
(iii) Byte is group of 16 bits
(iv) Following symbol for MAND gate



(v) PISO is parallel in serial out

Earning:   Approval pending.