Makhanlal Chaturvedi National University of Journalism and Communication 2005 M.Sc Information Technology Computer Organization and Architecture - - Question Paper

Duration: 3 Hours
Max. Marks: 100
Minimum Passing Marks: 40

Instructions:
1. The ques. Paper is divided into 5 units. every unit carries an internal option.
2. Attempt 1 ques. from every unit. Thus attempt 5 ques. in all.
3. All ques. carry equal marks.
4. presume suitable data wherever necessary.
5. English version should be deemed to be accurate in case of any anomaly in translation.
6.Protest against ques. paper, if any, should be lodged after paper through Head of Department Study Institute. No boycott of paper should be made under any circumstances by the examinees.

Unit-I
1.a. Draw a block diagram of control unit of a basic computer and discuss its working. (12)

b. What is handshaking? (8)

2.a. What is DMA? discuss the various kinds of DMA. (10)

b. discuss 2 methods of resolving priority of I/O devices. (10)

Unit-II
3.a. What do you understand by memory? discuss the various kinds of memories available with their access time, capacity and cost. (15)

b. discuss the term Core Memory. (5)

4.a. What is ALU? discuss. (10)

b. discuss floating-point representation. (10)

Unit-III
5.a. discuss various instruction formats of basic computer with examples. (10)

b. Classify the Micro-operations which are most often encountered in a digital computer. (10)

6.a. Differentiate ranging from fixed length instruction set and variable length instruction set. (10)

b. define the different modes of addressing formats. (10)

Unit-IV
7.a. With the help of a neat sketch discuss the function of a CPU. (10)

b. Differentiate ranging from Instruction Cycle and Instruction Pipelining. (10)

8.a. provide a overview of a Register Organization (10)

b. Write a short note on Pentium Processor. (10)

Unit-V
9.a. discuss the Instruction Execution characteristics. (10)

b. Differentiate ranging from hardwired control and microprogrammed control. (10)

10.a. provide an architecture of a decreased Instruction Set. (10)

b. discuss the different phases of an Instruction Cycle. (10)

Earning:   Approval pending.