Calicut University 2010-8th Sem B.Tech Computer Science and Engineering CS04 802 Computer architecture and parallel processing ,ester (Engineering) ,e - Question Paper
CS04 802 Computer architecture and parallel processing
Eighth semester B.Tech Degree (Engineering) Examination,June 2009
Time : 3 hours
contains
Part A
8 ques. carrying five Marks every
Part B
4 ques. carrying 15 Marks each
5286
VIII SEMESTER B.TECH DEGREE EXAMINATION JUNE 2010
Name.... Reg* No.
C S 04 802 COMPUTER ARCHITECTURE AND PARALLEL PROCESSING
Max. marks : 100
Time : 3 Hours
(Answer All Questions)
(8x5 = 40 marks)
1. 1) Discuss the various technologies that changes dramatically which leads to a critical problem for a modern implementation.
?,) Define Amdahls Law and explain the two factors which give the enhancement for speed.
3) What is Instruction'Level Parallelism? Explain.
4) Give the expansion for RAW, WAW, WAR and explain briefly,
5) Write the first optimization of cache performance and explain how it will reduce hit time.
6) Draw and explain the multilevel memory hierarchy. For what purpose the memory hierarchy will be helpful for the user.
7) Why the coherence and consistency are complementary? Explain.
8) What is meant by snooping? Write the different protocols used in snooping protocols.
11. (a) Define Benchmark. How the benchmarks will be the best choice to measure the performance of a real applications and give the examples for pitfalls inia] applications. (15)
(or)
b) (i) What is pipelining? Write the formula to perfectly balance the pipeline stage. (4)
(ii) Draw and explain the Data hazard and stalls. How the data hazard stalls is minimized using the forwarding technique. (11)
III. (a) (i) What is the difference between the pipeline and the Scheduling? How many clock cycles will take for the'4 Byte instructions? 0)
(ii) How the Data Hazard will overcome the Dynamic Scheduling (10)
(or)
IV. (a) (i)For what purpose the virtual memory concept is used in memory hierarchy. Write the difference between the Main memory and virtual memory. (5)
(ii) What is Hit time? Write the different ways to predict and trace the caches to reduce the hit time. (10)
(or)
(b) How the performance is measured in I/O systems? (15)
V. (a) Write the difference between the centralized shared memory and distributed shared memory. (15)
(or)
(b) Explain briefly about the models of memory consistency. Write about the advantages are achieved using the relaxed consistency model. (15)
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