Calicut University 2011-8th Sem B.Tech Computer Science and Engineering CS04 802 Computer architecture and parallel processing (Engineering) ,ember - Question Paper

CS04 802 Computer architecture and parallel processing
Eighth semester B.Tech Degree (Engineering) Examination,December 2011

Time : 3 hours

contains

Part A
8 ques. carrying five Marks every

Part B
4 ques. carrying 15 Marks each

D 21831    (Pages : 2)    Name........................................

EIGHTH SEMESTER B.TECH. (ENGINEERING) DEGREE EXAMINATION

DECEMBER 2011

OS 04 802COMPUTER ARCHITECTURE AND PARALLEL PROCESSING

(2004 Admissions)

Time : Three Hours    Maximum : 100 Marks

Answer all questions.

Part A

D 21831    (Pages : 2)    Name........................................

EIGHTH SEMESTER B.TECH. (ENGINEERING) DEGREE EXAMINATION

machine.

D 21831    (Pages : 2)    Name........................................

EIGHTH SEMESTER B.TECH. (ENGINEERING) DEGREE EXAMINATION

(b)    Whut is meant by caller saving and callee saving. Distinguish the above two with examples.

(c)    Explain dynamic scheduling with suitable example,

(d)    Explain compiler vectorization.

(e)    Explain the different levels in a memory hierarchy,

(f)    Explain protection in the Intel Pentium system.

(g)    Explain the generic interconnection network.

(h)    List the advantages of shared-memory communication mechanism.

Part B

2.    (a) (i) Derive the CPU performance equation.

(ii) Consider the following measurements :

Frequency of FP operation (other than FPSQR) = 30 %,

Average CPI of FP operations a= 4.00

Average CPI of other instructions = .1.33

Frequence of FPSQR = 20.

Assume that the two design alternatives are to decrease the CPI of #PSQIl to 2 or to decrease the average CPI of all FP operations to 2,5. Compare these twodosign alternatives using the CPU performance equation.

Or

(b) Explain the implementation of pipeline for DLX and list the implementation difficulties.

3.    (a) Draw a flowchart to bring out the steps involved in handling an instruction with a

branch-target and explain the flow.

Or

(b) Describe the basic compiler techniques used for exposing ILP.

4.    (a) Write note on:

(i)    DRAM technology.

(ii)    SRAM technology and

(iii),    Embedded processor technology.

Or

(b) (i) Explain the performance measures of an I/O system.

(ii) Write notes on unix file system performance.

5.    (a) What arc the practical issues for commercial interconnection networks ?

Or

(b) (i) Explain Flynn's classification of computers.

(ii) Discuss the performance metrics for communication mechanisms.

(4 x 15 s= 60 marks)

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Attachment: calicut-university-2011-b-tech-computer-science-and-engineering-32020-1.pdf

Earning:   Approval pending.