Calicut University 2006 B.E Electronics and Instrumentation Engineering THIRD SEMESTER B.TECH(ENGINEERING) - DIGITAL SYSTEM - Question Paper

C 20900

THIRD SEMESTER B.TECH. (ENGINEERING) DEGREE EXAMINATION, JUNE 2006

BM/AI 04 305-DIGITAL SYSTEM
(2004 Admission)

Time: Three
Hours
Maximum: 100 Marks

ans all ques..

1. Convert the subsequent logic function into maxterm.
Y= (A+B) (B+C) (C+D) (D+E)

2. What is meant by universal gate? discuss.

3. Draw three to eight decoder and discuss

4. Explain the function of S-R flip-flop with circuit diagram.

5. Construct monostable multivibrator using gates and discuss

6. Draw the NMOS NOR gate circuit and discuss

7. Distinguish ranging from synchronous sequential circuit.

8. Explain about (i) state diagram and (ii) state stable.

(8 x five = 40 Marks)

II. (a) perform the subsequent operations:

(i) (CFD 7.25)16 – (AB 5-8)16 = (?)8

(ii) (6 ABF.6D) 16 / (1A)16= (?)10

(iii) (5032.6E) 16 x 616 = (?)2


Or

(b) decrease the subsequent function using K-map and implement it using NOR gate only :

F = pM (1, 2, 3, 5, 6, 7, 8, 9, 12, 13)

III.(a) Draw the block diagram of 4-bit carry look-ahead adder and discuss.

Or

(b) (i) draw the circuit of a static memory cell and discuss its operation.
(10 Marks)
(ii) Draw one of eight demultiplexer and discuss. (5 Marks)


IV.(a) Draw the circuit of 4-bit shift register and discuss its four mole of operation.

Or

(b) Draw the circuit diagram of a two-input schottky TTL NAND gate and discuss its function.


V.(a) Draw the block diagram of the serial binary adder and discuss with state diagram and state table.

Or

(b) Design asychronous sequential circuit to provide about one when the input ‘y’ goes from ‘0’ to ‘1’ or from ‘1’ to ‘0’ after ‘x’ input goes to ‘0’.

(4 x 15=60 marks)

Earning:   Approval pending.