Maharashtra State Board of Technical Education 2009 Diploma Electronics Engineering (DEE) Test of Digital System Design - Question Paper

Sample Test Paper-I
Course Name : Electronics Engineering Group
Course Code : DE
Semester : Fourth
Subject : Digital System Design
Marks : 20 Time: one Hours.
Instructions:
1. All ques. are compulsory.
2. Illustrate your answers with neat sketches wherever necessary.
3. Figures to the right indicate full marks.
4. presume suitable data if necessary.
5. Preferably, write the answers in sequential orders.
Q.1 Attempt any two. 04Marks
1) describe Computer.
2) What do you mean by sequential circuit.
3) describe Hold time with respect to Flip Flop.
Q.2 Attempt any two. 08 Marks
1) Convert S R Flip Flop into J K Flip Flop
2) Simplify using K –maps f (ABCDE) =
m (0,1,2,7,8,11)
3) discuss working of sequence generator.
Q.3 Attempt any 2 08 Marks
1) discuss working of up-down Counter.
2) Draw & discuss SR – Flip Flop using NAND gate only.
3) What do you mean by Parity Checker & generator.

Earning:   Approval pending.