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Lovely Professional University 2008 Mid-Term (Computer Architecture) - Question Paper

Friday, 25 January 2013 03:35Web

CSE211 : Computer Organization and Architecture
ques. PAPER

1. a) Specify the criteria used to classify an instruction into MRI, RRI, or I/O Instruction.
b) What will be the size of data bus and address bus for a memory unit of size 512 x eight (512 words of eight bits each)
c) Draw block diagram to represent the operation P: R1? R2
d) Address Sequencing Capability requires support for 4 various functions. describe them.
e) Determine the logic operand and logic operation that will change the value 1001 to all-zeroes
[2 x five = 10]

2. a) Design and discuss the working of a circuit that reduces the value of a 4-bit number by one.
b) Represent the design and functioning of Control unit with a block diagram
[6 + four = 10]

3. a) An 8-bit register R1 contains the value 1000 0001. Determine its value after the subsequent operations:
i. R1? ashl R1
ii. R1? cir R1
b) Design one-stage of an Arithmetic-Logic-Shift unit. discuss its working. Also specify the function table for its operations
[2 + eight = 10]

4. a) Show the process of monitoring and handling interrupts in the system using a flowchart.
b) What condition determines that the stack is full (FULL ? 1) during the Push operation?
c) describe the purpose, control function, hexa-decimal code and micro-operation sequence corresponding to subsequent computer instructions:
i. ADD
ii. BSA
iii. SKO
iv. CIL
v. HLT
[4 + one + five = 10]

5. a) Draw block diagram for micro-programmed control organization. Briefly describe the role of every block.
b) Convert the expression { six + ( eight – two ) * four } / three into postfix. DO NOT SOLVE
c) Write 3-address assembly instructions to perform X = ( A + B ) / (A – B)
d) provide at lowest 2 points of differences ranging from every of the subsequent pairs:
i. Immediate Addressing Mode and Implicit Addressing Mode
ii. Interrupt and Subroutine Call
[2 + two + two + four = 10]



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