Maharashtra State Board of Technical Education 2007-3rd Sem Diploma Computer Technology in (CM) - Question Paper

Q.1 Attempt any 8 16

a)Draw SR latch using NAND gates.
b)Implement OR gate using only NAND gates.
c)Convert foll expression into standard SOP form.
Y=A+B.
d)How many flip-flops are reqiured to construct foll modulus counters?
(i) 5
(ii) 83
(iii) 99
(iv) 10
e)Compare RAM and ROM. provide any 4 points .
f)State any 4 application of DAC.
g)Perform the foll multiplication in binary number system.
(15)*(8).
h)List any 4 boolean laws, used to decrease boolean expression.
i)Draw logic symbol and truth table for D flip-flop.
j)Sketch the circuit for provided expression.
Y=AB+AC

Q.2 Attempt any 3 12

a)Compare TTL and CMOS logic families (any eight points)
b)For the function F=X(bar).Y+X.Y(bar). obtain the compliment of 'F'.
c)State and verify Demorgan's 1st theorem using truth table.
d)Explain race around condition in level triggered JK flip-flop.

Q.3 Attempt any 3 12

a)Design two bit synchronous counter and draw its logic diagram
b)Classify Memories. provide the function of every kind.
c)Compare Ramp kind and SAR kind ADC's.
d)Draw logic diagram for four bit ring counter and draw waveforms for it.

Q.4 Attempt any 4 16

a)Perform the foll binary division
(25)/(5)
b)Design half adder using K map and realise it using basic gates.
c)Obtain 8:1 multiplexer using 4:1 multiplexers.
d)Desogn Mod-5 ripple counter and draw its logic diagram with reset logic.
e)Compare SRAM and DRAM (give any 4 points).
f)List any 4 advantages of R-2R ladder DAC.

Q.5 Attempt any 3 12

a)Add 83 and 34 in BCD.
b)Explain use of NPN transistor as a NOT gate.
c)Implement the subsequent boolean function using multiplexer
f(ABC) = E(2,4,5,7).
d)Draw circuit diagram of three bit SIPO shift register using D flip-flops. discuss its working.

Q.6 Attempt any 3 12

a)State any 4 characteristics of ECL logic families.
b)Convert (6AC)10 = (?)10 (?)2.
c)Design one bit comparator using K map and draw its logic diagram.
d)Explain operation of 4:1 mux using logic diagram.

Earning:   Approval pending.