Andhra University 2005-1st Year B.Tech Computer Science and Engineering Forth Semester -FAULT TOLERANT COMPUTING (ELECTIVE-I) - Question Paper
Wednesday, 01 May 2013 02:35Web
MODEL PAPER
B. Tech (CSE) Degree exam
Forth Year - 1st Semester
FAULT TOLERANT COMPUTING (ELECTIVE-I)
Effective from the admitted batch of 2004-2005
Time: three hrs
Max Marks: 70
First ques. is Compulsory
ans any 4 from the remaining ques.
All ques. carry equal marks
ans all parts of any ques. at 1 place
1. a) describe reliability and failure rate
b) provide an example for temporary fault in digital circuit
c) What is PODEM?
d) provide an example for stuck-at-fault
e) discuss signature analysis
f) What is the importance of fault tolerance?
g) What is testability?
2. a) Distinguish ranging from Maintainability and Availability
b) What is fault modeling? discuss with a suitable example circuit.
3. discuss D-algorithm with an example.
4. provide the detailed procedure for testing of sequential logic circuits as iterative combinational circuits.
5. a) Distinguish ranging from Random testing and Transition count testing.
b) What is static redundancy? How is it used to improvr the fault tolerance.
6. How are the fault correcting coeds used to give a fault tolerant design of memory systems.
7. a) provide a detailed procedure for Syndrome Testable Design
b) discuss in brief how designing testability into logic boards is given
8. Write short notes on the following:
a) Detection of Multiple Faults b) Practical Fault Tolerant Systems
c) Reed-Muller Expansion technique d) The 2 rail Checker
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