Deemed University 2009 A.M.I.E.T.E Electronics

(B)
(C)
(D)
h. If and denote the convex hulls of the sets of actual and False vertices of a function H respectively, then if where denotes the empty set, then the stated function is
(A) Threshold function. (B) Symmetric function.
(C) Unate function. (D)Walsh function.

i. An N-bit Jhonson counter generates a counting sequence of length.
(A) N/2 (B) 1
(C) N (D) 2N

j. In FPLA
(A) Only AND arrays are programmable.
(B) Only OR arrays are programmable.
(C) Both the AND array and the OR array are programmable.
(D) None of these are programmable.


ans any 5 ques. out of 8 ques..
every ques. carries 16 marks.



Q.2 a. List the advantages and disadvantages of a digital circuit over an analog circuit. (4)

b. Prove X + (Y Z) = (X + Y) (X + Z) = (X + Y) (X + Y + Z). (4)

c. Simplify A . C + A . (C + B) + C . (C + B) using Boolean algebra and Realize the simplest possible circuit. (4)

d. Convert (A+B+C).(A+D) expression into standard Product Of Sum form. (4)

Q.3 a. discuss the method to determine the provided function is symmetric. (4)

b. Determine which of the subsequent functions is symmetric and identify its numbers and variables of symmetry. (4)
f (X,Y,Z) = S(1,2,4,7)

c. Write a short note on Symmetric Networks. (4)

d. Determine whether the function f (x1, x2, x3, x4) = S (0, 1, 3, 4, 5, 6, 7, 12, 13) is a threshold function, and if it is, obtain a weight-threshold vector. (4)

Q.4 a. Convert the subsequent Mealy machine to an equivalent Moore machine. (8)

current State
Next State, Output
X=0
X=1
A
C, 0
B, 0
B
A, 1
D, 0
C
B, 1
A, 1
D
D, 1
C, 0
b. Write a VHDL code for simple MUX by using structural and data-flow styles. (4)


c. Write a short notes on:

(i) Guarded Blocks.
(ii) Block Statements. (4)

Q.5 a. provided a logic design and implementation using the multiplexers for
F1= S (3, 7) using a 4:1 multiplexer. (4)

b. discuss a 4-bit adder cum subtraction circuit, which uses the XORs as a controlled inverter. (4)

c. discuss the difference ranging from a decoder and a digital multiplexer? define 4 applications of a decoder. (4)

d. discuss a parallel in serial out (PISO) left shift register using a state table. (4)

Q.6 a. describe a fundamental mode and pulse mode of operations for a sequential machine (4)

b. Compare Moore model and Mealy model with example. (4)



c. For the Logic Circuit, construct transition. Table and determine all critical races and non-critical races. Explore the possibility of cycles. (8)



Q.7 a. explain the FPGA based design flow and specify the various tools available in the market for every abstraction level. (4)

b. Write the VHDL Code for D flip-flop with asynchronous clear and preset using behavioural approach. (4)

c. Write a VHDL code for 1 bit full adder using data flow architecture. Extend it to 4-bit adder using structural approach. (4)

d. List the differences ranging from variable and signals. discuss with 1 example. (4)

Q.8 Write short notes on the following: (16)
(i) Hazards and Races
(ii) GAL devices
(iii) CAD tools in digital system design
(iv) Mixed style of Modelling in VHDL

Q.9 a. Draw ASM chart of a serial adder and synthesize the Logic circuit. (8)

b. discuss the concept of microprogramming. define the "Horizontal microprogramming" and "vertical microprogramming. (8)

Earning:   Approval pending.