Kannur University 2011-3rd Sem B.Tech Vester Engineering (Reg./Supple./Imp.) Including Part Time ,, PT 2K6 /2K6 EC 805(c) : COMMUNICATION SWITCHING SYSTEM - Question Paper
Thursday, 24 January 2013 07:45Web
VIII Semester B.Tech. Engineering Degree (Reg./Supple./Imp.) Including Part Time Degree Examination, April 2011
(2007 Admin.)
Electronics and Communication
PT 2K6 /2K6 EC 805(c) : COMMUNICATION SWITCHING SYSTEM
Time: three Hours Max. Marks: 100
ans all questions.
1. discuss distributed stored program control with the help of a neat diagram. [Marks 5]
2. obtain an expression for blocking probability of a two-stage TS switch. [Marks 5]
3. discuss with a neat block diagram a 3 stage STS switch. [Marks 5]
4. discuss with a neat block diagram a 2 stage STS switch. [Marks 5]
5. write a note on GOS and blocking probability. [Marks 5]
6. Write B-D equations and discuss all the terms in these equations. [Marks 5]
7. discuss the basic scheme for CCS signalling with a neat diagram. [Marks 5]
8. discuss the typical CCS signalling message formats with diagram.[Marks 5]
ans the subsequent 15 marks ques..
1. A) discuss the basic time division space switching with a neat diagram of a
output controlled time division space switch. [Marks 15]
OR
1. B) discuss the principle of time slot interchange with a neat diagram.[Marks 15]
2. A) Discribe the call processing structure of AT & T 5ESS switch with a neat diagram. [Marks 15]
OR
2. B) discuss the BD process. Derive steady state equations for BD process.[Marks 15]
3. A) Derive the poisson arrival process formula starting from BD process equations.[Marks 15]
OR
3. B) Show that the blocking probability tends to zero assuming infinite sources in LCC model.[Marks 15]
4. A) discuss the various kinds of inchannel signalling.[Marks 15]
OR
4. B) discuss SS7 architecture along with its all formats of signalling units.[Marks 15]
Earning: Approval pending. |