KIIT University 2008 B.Tech Electronics and Tele-Communication Engineering MICROPROCESSOR - Question Paper
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MICROPROCESSOR
-----------5TH SEMESTER 2008------- YzBjech Regular & Ra MP EC 502 (EE, E&EE, E&TC, IT)
FIFTH SEMESTER EXAMINATION-2008 MICROPROCESSOR [ EC 502 ]
Full Marks: 70 Time: 3 Hours
Answer any SIX questions including Question No. I which is compulsory.
The figures in the margin indicate full marks.
Candidates are required to give their answers in their own words as far as
practicable and of all parts of a question should be answered at one place only.
1. [1x10
i) If a crystal of 2 MHz is connected across X1 and X2 pins of a 8085 Microprocessor, what would be the time taken to execute the instruction LDA 2080 H?
ii) What is the use ofHOLD pin in 8085 Microprocessor?
iii) The content of the Accumulator in 8085 after ADD operation is 11001100. What would be the status of zero and parity flags?
iv) Identify the Addressing modes used in the following Instructions (a) LXI SP, 2000 H (b) OUT FF H
v) Assume [4000 H] = 06 H and [4001 H] = 04 H. What are the contents of H and L registers after the execution of the instruction LHLD 4000 H?
vi) Name the machine cycles used for fetching and executing the instruction CALL 5000 H.
vii) How many address pins are available in a 27256 (32 Kx 8) EPROM chip?
viii) What would be the control word to set bit PC3 of Port C in 8255 in BSR mode?
(i)
KffT-U/2008/Autumn End Semester Examination-2008
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cs | ||
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8255 | ||
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>-- | ||
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>---- | ||
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A |
A, | |
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A,_~ _A0- | ||
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IOR |
RD | |
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IOW ' |
WR | |
Find the Address of the Control Register of 8255 in the configuration given,
x) Determine the OCW1 for a 8259 PIC to unmask only IR4 and mask the rest of the interrupt inputs.
2. a) Draw the Internal Architecture of 8085 Microprocessor and explain about ALU, Program Counter and Stack Pointer.
b) How is the Lower Address Bus and Data Bus demultiplexed externally in a 8085 Microprocessor system?
c) What are the different Control and Status signals available in 8085 Microprocessor?
3. a) Explain what operation is performed on execution of the following instructions of 8085.
(i) SUI data (ii) CMP B (iii) LDAX B (iv) XCHG
b) What is the use of STACK in a Microprocessor system? Explain the sequence of operation when the instruction PUSH B is executed.
c) Draw the Timing diagram forthe INAmachine cycle for fetching and executing a one byte RST opcode and explain the various signals shown in the Timing diagram.
4. a) Discuss the role of a one pass and a two pass Assembler.
(2)
KltT-1. 2066/Autumn End Semester Examination-2i
b) A delay subroutine to be implemented in 8085 Microprocessor is given below.
T states
10
4
4
4
10/7
10
LXI D, 012CH LOOP: DCX D
MOV A, E ORA D JNZ LOOP RET
Find out the time delay that would be generated if the system clock period is 0.5 \iS.
c) Design a suitable interface circuit with a 3 to 8 decoder chip to interface the following memory chips to a 8085 Microprocessor.
.1 no. of 4Kx 8 EPROM
1 no. of 8Kx 8 RAM
Starting address of EPROM chip should be from 0000 H and the RAM chip from 4000 H.
Show the memory map also.
d) What are the various Debugging methods used in Software Development?
5. a) What is the advantage of the Interrupt driven data transfer
scheme over the Asynchronous data transfer scheme?
b) How can the programmer selectively mask some of the hardware interrupts in a 8085 Microprocessor? What could be the necessity for such masking?
c) In the 8085 Interrupt system, how is the INTR interrupt used? Explain with suitable circuit diagram.
6. a) Frame a Control Word for the following configuration
of Ports of 8255 -
Port A as input Port in Mode 1
Port B as input Port in Mode 0
. Port C[ower as input and rest pins of Port C as output
(3)
K fIT-V/2008/Autumn End Semester Examination-2008
b) Explain the MODE-1 operation of Port A in a 8255 PPI while it is configured in the input mode and describe the various handshaking signals.
c) What would be the status of CS, C/D, WR and RD so that 8085 can perform the following operations with a 8251 (USART)?
(i) To write a word into Control register
(ii) To read a byte from Status register
(iii) To read a byte from Data bus buffer
d) What is Framing in Serial Transmission?
7. a) Determine the Mode word for a 8251 to transmit characters with the following parameters.
Async Mode with 9600 baud
(Clock freq at TxC is 153.6 KHz)
Character length = 7 bits and 2 stop bits
No parity check
b) Describe the sequence of operation of a 8259 when a device connected to IR2 pin requests to interrupt the processor when IR4 is being serviced.
c) Frame the iCW1 and ICW2 for a single 8259 chip in a 8085 system with the following parameters.
Call Address for IRO to be placed at 8000 H
Call Address Interval of 4
Edge Triggered
8. Short Notes (Any Four) Px
a) Status Flags of 8085 and their significance
b) Memory Mapped I/O and I/O mapped I/O
c) Direct Addressing and Register Indirect Addressing modes of 8085.
d) Rotate Instructions of 8085
e) Assembler Directives ORG and DB
f) Use of Assembler and Editor (Software developmenttools)
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KIIT-tJ/20OH/Autumn End Semester Examination-2008
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