KIIT University 2009 B.Tech Electronics and Tele-Communication Engineering Computer system architecture - Question Paper
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SIXTH SEMESTER EXAMINATION-2009
COMPUTER SYSTEM ARCHITECTURE [ CS 604]
Full Marks; 70 Time: 3 Hours
Answer any SIX questions Including Question A'o.l which is compulsory.
The figures in the margin indicate full marks.
Candidates are required to give their answers in their own words as far as practicable and of all parts of a question should he answered at one place onh.
1. a) Justifywhetherpresentdaycomputersarebasedon [2*10 Von-Neumann architecture or not.
b) Why microprogrammed control unit is better than hardwired control unit?
c) Write the requirement of memory interleaving with an example.
d) Can DMA support multitasking in a computer? Justify your answer.
e) Write two differences between arithmatic and instruction pipelining with example.
0 If the average cache access time is 9 nsec, hit rate is
0.65 and miss penalty is 15 nsec, calculate the time required to access a word in cache.
g) Write the advantage and disadvantage of Load Through policy.
(i)
KHT-U/Mn/Sprtnt End Stntntr tMmnaito*-2Q09
Justify that (fra micro-operations depend upon the architectural specification.
i) us/njLfiU repfacernerrta/gorrtfim, calculate total no. of Ms and misses If the no. of pages present m cache is3, for (he following sequences of cachs access like;
4.2.0.5.2.6. 1,4,0,1,0,2, 3,5,7 j) Write the significance of Handshaking1 In I/O wmmurucatm
2. a] Describe different types of instruction. And analyse their characteristics b) tftieconlentof PC is 200 and R, is 400, calculate the content o< AC in smnediate. direct indirect, register direct and register indirect addressing mode for the following contents of memory, where Uie instruction occupies two words in a block.
Memory MOPE I IX)ADTOAC| ADDRESS = 500or R, ' Next Instruction
450 700
SOO
900
325
300
200 1
2QI
399
400
500
600
102
*00
O)
ffjrMtfMMflMt IM Tmw L'liwmio mt
f* a) Compare between hardwired control unit ana (5 microprogrammed control unit, b) Write the micro routines for the instruction ADD (R,).R, (5 which adds the content of memory location pointed by the content of R, with the content of R;and stores m R2. using CPU single bus and 3-bus connectivity.
4. a) Draw the block diagrams of Input/output parallel [5
interfacing end explain theirfunctions in details.
b) Explain various'DMA'transfer techniques with their [5 advantages and disadvantages,
5. a) Discuss different ppelning hazards with examples. (5 b) Calculate the speed up in pipelining if (he number of [5
tasks to be executed are 50, tnonpiB.llol- Is 15 nsec, no. of stages in pipelining is S end is 3 nsec.
6. a) Explain Booth's multiplication techniques with a [S
suitable example.
b) Categories the computer architecture according to (3 'Flynn's* classification and explain each categories in brief.
7. a) Design amemoy module of the size ol 1024K* 16 15
RAM and 612K x 16 ROM with available RAM chip of size 2S6K * 6 and ROM chip of Size 256K* 8.
P)
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b) Explain mapping techniques with their requirement, advantages and disadvantages.
8. Write short notes on any two.
(5
%
15x2
a) Cache Memory
b) Wilkes Model
c) RISC Vs CISC
xxxxx
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