Jawaharlal Nehru University (JNU) 2008-1st Sem B.Tech R05310201 Set No2,III Supplimentary s,,COMPUTER ORGANISATION - exam paper

Code No: R05310201 Set No. 2
III B.Tech I Semester Supplimentary Examinations, February 2008
COMPUTER ORGANISATION
( Common to Electrical & Electronic Engineering, Electronics &
Communication Engineering, Electronics & Instrumentation Engineering,
Electronics & Control Engineering and Electronics & Telematics)
Time: three hours Max Marks: 80
ans any 5 ques.
All ques. carry equal marks
? ? ? ? ?
1. (a) discuss the terms computer architecture, computer organization and com-
puter design in a detailed fashion. [8]
(b) discuss about MIPS, FLOPS rating of a processor. How do we arrive at these
values. [8]
2. (a) What is the use of buffers. discuss about tri-state buffers. discuss about
high impedance state. [6]
(b) discuss commonly employed bit shift operators such as shift left, right, circular
shift left/right and arithmetic shift left/right. presume an 8-bit register, provide
an example for every [10]
3. (a) discuss the variety of techniques available for sequencing of microinstructions
based on the format of the address info in the microinstruction. [8]
(b) Hardwired control unit is faster than microprogammed control unit. Justify
this statement. [8]
4. Draw a flowchart to discuss how 2 IEEE 754 floating point numbers can be
added, subtracted and multiplied. presume single precision numbers. provide example
for every [16]
5. (a) ”In paged segmentation, the reference time increases and fragmentation de-
creases”, Justify your ans.
(b) A Virtual Memory System has an address space of 8K words and a Memory
space of 4K words and page and block sizes of 1K words. Determine the
number of page faults for the subsequent page replacement algorithms: 1) FIFO
2) LRU if the reference string is as follows: 4,2,0,1,2,6,1,4,0,1,0,2,3,5,7. [8+8]
6. (a) discuss bit oriented and character oriented protocols in serial communication.
(b) elaborate the various problems behind serial communication? discuss. [8+8]
7. (a) What is pipeline? discuss. [8]
(b) discuss arithmetic pipeline. [8]
8. What is cache coherence and why is it important in shared memory multiprocessor
systems? How can the issue be solved with a snoopy cache controller? [16]

Earning:   Approval pending.