Jadavpur University 2007 B.E Mechanical Engineering ELECTRONICS - Question Paper

FIRST ENGINEERING MECHANICAL EXAMINATION, 2006
Form A : Paper-setting Blank Ref. No : Ex/ME/ET/T/123/76/2006(New)
(2nd Semester)
SUBJECT : Electronics
Full Marks 100
Time : 3 hours (50 marks for every part)
Use a separate Answer-Script for every part
No. of
ques. PART I / PART II Marks
1.
ans ques. no.1 and any other 4 from the rest.
Write short notes on the subsequent (answer any four):
a). Metal, Insulator and semiconductor – on the basis of
bond structure.
b). Light Emitting Diode and Photo Diode.
c). Merits and demerits of Bridge rectifier over ordinary
full-wave rectifier.
d). different regions of output characteristics of a transistor
operation.
e). The relationship ranging from small – signal short-circuit current
gains of a transistor in CB and CE modes.
f). Transistor biasing
g). capacitor filter
5×4
2. a). Using suitable schematic diagram, – explain the mobile
charge distribution, space–charge concentration and barrier field,
potential & energy trends for on unbiased p-n junction.
8
b). A p-n junction Ge diode has a reverse saturation current
of 1.5 µA at 300ºK. find the static and dynamic resistances
of the diode at that temp. For on applied forward bios of 0.3 volt.
4
c). discuss with a suitable diagram the application of zener–diode
as a voltage regulator.
6
d). State the characteristics difference ranging from avalanche
breakdown and zener breakdown of zener diode.
2
3. a). discuss with suitable diagram the operation of a half–wave
rectifier taking sinusoidal input.
6
No. of
ques. PART I / PART II Marks
b). Deduce the expression for avg. current, ripple factor
and conversion efficiency in case of a full–wave rectifier
circuit.
7
c). A bridge rectifier circuit has a load of 2.5 kO and is fed
from 100 v (rms) supply. every diode has a forward resistance
of 100 O. compute the dc. load voltage, the ripple voltage
and the percentage regulation.
7
a). discuss the operation of a bridge rectifier with the help of a
circuit diagram. Draw the waveforms of the diode current
and load voltage (For sinusoidal input voltage) Is it
necessary for all diodes of a bridge rectifier to be identical?
Justify your ans.
2+3+1
b). What do you mean by intrinsic and extrinsic semiconductors? 2+3+1
How p–type semiconductor can be formed? Is a p–type semiconductor
positively charged?
c). compute the ripple of a capacitor filter for peak rectified
voltage of 30 volts, capacitor c = 50 µF and a load current of
50 mA.
4
4.
d). A dc. power supply has an output voltage of 60 volts in
no–load condition when connected to a load, the output voltage
drops to 58 volts. compute the value of voltage regulation
factor. What should be value of voltage regulation for ideal
power supply?
4
5. a). discuss the operation of transistor action of BJT and explain
about its current components.
6
b). Draw the circuit for fixed–bios arrangement for an n–p–n
transistor operating in CE mode and discuss its operation.
Also deduce the expressions for stability factors.
9
c). State and explain the input and output distortions in case
of BJT operation.
5
No. of
ques. PART I / PART II Marks
a). Analyse the operation of transistor amplifier using h–parameters
and deduce the expressions for current gain, voltage gain and
6. 10
b). discuss the operation of a cascaded RC–coupled amplifier using a
suitable circuit diagram. Deduce the expression for its mid–frequency
gain.
10
a). State the effects of negative feedback in an amplifier. 2
b). With the help of a suitable diagram, derive an expression for
the transfer gain of a feedback amplifier.
6
c). What is an Oscillator? describe relaxation oscillator,
negative resistance oscillator and feedback oscillator.
2+3
7.
d). State the properties of an ideal OP–AMP. explain the
operation of Summing Amplifier (employing OP–AMP)
2+5
a). Draw the logic symbol and state the corresponding Boolean
expression along with the Truth–table for two–input.
XOR, ENOR gates.
3×2
b). Using only NAND and NOR gates, design two–input
AND gate and OR gate (apply De Morgan’s theorem).
3×2
8.
c). Draw the logic symbol and state the Truth–table of SR
Flip–Flop. Design a SR Flip–Flop employing NAND gates
only.
4+4

Earning:   Approval pending.