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University of Pune 2006 B.E Computer Science Computer Organisation - Question Paper

Monday, 22 April 2013 05:00Web


S.E. (Computer) exam 2006

Computer Organisation

Or

8. (a) Explain the following :

(i)    EPROM

(ii)    EEPROM

(iii)    SRAM (tu) DRAM

(v) RDRAM    [10]

(b) What is meant by Virtual Memory ? Explain with the help of a neat diagram, the virtual memory address translation. (6)

9.    (a) What is DMA ? Explain DMA operation with a diagram. What

is single transfer mode and block transfer mode ? 110) (6) Explain PCI bus with a diagram.    [6]

Or

10.    (a) Explain the synchronous bus in an input operation with timing

diagram.    [8]

(6) Compare programmed I/O and interrupted driven I/O. Which is advantageous ? Why ?    [8]

11. (a) Explain with a neat diagram the interprocessor communication

between the 8086 and 8087.    [8]

(b)    What is Bus Arbitration ? Explain    :

(t) Daisy chaining

(ii) Polling methods of arbitration.    [8]

(c)    Explain RISC architecture.    [2] 12962J-189 3    P.T.O.


15 may 20%

Total No. of Questions121    (Total No. of Printed Pages4

[2962]-189

S.E. (Computer) EXAMINATION, 2006 COMPUTER ORGANISATION (2003 COURSE)

Time : Three Hours    Maximum Marks : 100

N.B. : (i) Attempt any three questions from each Section.

(ii)    Answers to the two Sections should be written in separate answer-books.

(iii)    Neat diagrams must be drawn wherever necessary.

(iv)    Figures to the right indicate full marks.

SECTION I

' 1. (a) Draw the hardware implementation of Booths algorithm and ?    explain the same.    [81

(6) Represent - (309.1875)jg in single precision and double precision formats.    [81

Or

2.    (a) Draw the flowchart for Non-Restoring Division algorithm and

perform Division of the following numbers using Non-Restoring Division algorithm :

Dividend = 1011

Divisor = 0011    [10]

(b) Draw the flowchart for floating point addition and explain. (6)

3.    (a) Write control sequence for an unconditional branch

instruction.    [81

(6) What are the different design methods for hardwired control units. Explain any one.    [8]

P.T.O.







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