Indian Institute of Technology Roorkee (IIT-R) 2007 B.E Computer Science computer Organization - Question Paper

Fourth Semester B.E Degree exam
(Common to CS and IS)
Model ques. Paper
06CS46 Computer Organization
Note: ans any 5 Full questions, selecting at lowest 2 ques. from
every PART
Time: three Hours Maximum marks : 100
PART -A
1. a. discuss how the performance of a computer can be measured? elaborate the
measures to improve the performance? (8)
b. Represent the number 81234561 in 32-bit Big-Endian and Little-Endian
memory organization. (6)
c. Represent (-56)10 and (56)10 in sign magnitude, 1’s complement and 2’s
complement methods (6)
2. a. discuss any 4 addressing modes with examples for every. (8)
b. What is stack frame? Illustrate the use of stack frame in the mechanism for
implementing subroutines. (8)
c. define the use of shift and rotate operations with examples (4)
3. a. Differentiate memory mapped I/O and I/O mapped I/O. (4)
b. define the use of Interrupts with an example. (4)
C. Describe, how four devices can be connected in daisy chain method to process
their interrupt requests. (4)
d. Compare programmed I/O, interrupt driven I/O and DMA based I/O (8)
4. a. Compare serial and parallel interfaces for efficiency and complexity with
examples (6)
b. elaborate the features of SCSI bus? Write a note on arbitration and selection
on SCSI bus (6)
c. define the split bus operation. How can it be connected to 2 fast
devices and 1 slow device? (8)
PART B
5. a. provide the organization of 1Mx32 memory using 512x8 SRAM chips. Clearly
show the address decoding. (8)
b. describe Hit ratio and miss penalty for cache access. (4)
c. provided a Hit ratio of 0.92, cache access time of 40ns and main memory
access time of 300 ns, compute the avg. access time. (4)
d. discuss direct mapped cache. (4)
6. a. discuss with block diagram how TLB is used in implementing virtual
memory? (8)
b. discuss four bit carry-look ahead adder and use it to build a 12 bit carry-look
ahead adder. (8)
c. Perform 56-78 using 1’s complement and 2’s complement methods. (4)
7. a. Using Booth algorithm multiply (-13) and (+107). (8)
b. Draw a circuit diagram for binary division and discuss its operation (8)
c. Differentiate restoring and non-restoring division. (4)
8. a. discuss hardwired control unit with diagram. (10)
b. Write and discuss control sequences for execution of the instruction
SUB R1, (R4). (10)

Earning:   Approval pending.