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Thapar University 2006 M.C.A Elments of Electronics Engineering - Question Paper

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Thapar Institute of Engineering & Technology
MCA (1st Year)
Final Term exam
CA002(Elments of Electronics Engineering)

Thapar Institute of Engineering & Technology, Patiala CA 002 (Elements of Electronics Engineering)

End Sem- Exam: Decemberl5, 2006    Time: 3 hour

Maximum Marks: 72

   Attempt any four questions.

   The subparts of a question should be attempted in sequence.

   Evaluated answer sheets can be seen on December 18, 2006 at 2 pm in Room no. B210

QA

a)    Explain why energy levels in a crystal split up to form energy bands?

b)    Explain the Early effect and its consequences.

c)    Explain why BJTs are called bipolar devices while FETs are called unipolar devices.

d)    Find the concentration (densities) of holes and electrons in n-type silicon at 300K, if conductivity is 300 S/cm. Also find these values for p type silicon. Given that for Silicon at 300K, n=1.5xlOlo/cm3, jin=1300cm2/V-s and , jip=500cm2/V-s.

(4.4.4.6)

Q2

a)    What are relative merits of an N- channel MOSFET and a P-channel MOSFET.

b)    What are limitations of an open loop operational amplifier configuration?

c)    A FET has a driven current of 4 mA. If Ioss=8mA and Vos(off)= -6V. Find the values of Vqs and Vp.

d)    Explain the laboratory setup for obtaining the Common Collector configuration. Also, discuss the utility of this configuration, if any.

(4.4.4.6)

Q

a)    What are the desirable characteristics of the input stage of an operational amplifier? Explain.

b)    Draw the logic circuit of edge triggered JK flip-flop and explain its working.

c)    Some decoders have one or more enable inputs. What is the function of these enable inputs.

d)    An inverting amplifier exhibits a flat response up to 40 k Hz. The gain of amplifier is 10. What maximum peak to peak input signal can be applied without distorting the output? Given slew rate - 0.5 V/ns.

(4.4.4.6)

a)    What is shift register? Discuss its main characteristics.

b)    Design a logic circuit having three inputs A, B and C such that output is 1 when A=0 or whenever B=C=1.

c)    Simplify the expression using Karnaugh map f (A,B,C,D) = 1(1,5,7,8,9,10,11,14,15).

d)    Draw logic circuit for expression, Y = [AB (C+BD)+A B]C. Simplify the expression and draw logic circuit for the simplified expression.

(4.4.4.6)

QJ>

a)    What is a multiplexer tree? Why is it needed?

b)    Explain the function of control inputs and clock input in a flip flop.

c)    A 4 bit ripple counter has a count of 1001 at any instant. W'hat will be the count after 23 pulses.

d)    Design an octal to binary encoder and explain what do you mean by a parity encoder.

(4.4.4.6)







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