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Saurastra University 2006 M.C.A Computer Organization & Architecture - Question Paper

Thursday, 18 April 2013 04:40Web



SX-7297    Seat No._

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M. C. A. (Sem. - I) Examination April / May - 2006 Computer Organization & Architecture

[Total Marks : 75

Time : 3 Hours]

Instructions


(1)    Total 5 questions. All compulsory.

(2)    Marks for each question are indicated at the right end of first line of each question.

Que-1 Answer any Five    [ 10)

1.    What is the use of registers PC and DR in basic computer?

2.    What is Microprogram?

3.    Explain Condition field and Branch field of Microinstruction.

4.    What is pipelining?

5.    Differentiate Isolated Vs Memory mapped I/O.

6.    What is Bit Oriented Protocol7

7    What is Cache memory7

Que - 2 Answer any Four    |20|

].    Explain common bus system

2.    Explain Instruction Cycle.

3    Design microprogram Sequencer for control memory.

4.    Explain Addressing modes.

5.    Explain General Register Organization.

6.    Explain Parallel processing:

Que - 3 Answer any Five.    [15]

1.    Explain Instruction code.

2    Explain instruction set completeness.

3.    Describe BUN, BSA and ISZ instructions.

4.    Explain Mapping from instruction code to microinstruction address.

5.    Explain memory stack.

6.    Explain data manipulation instructions.

7.    Explain Characteristics of RISC Architecture.

4 Answer any Three.

Explain DMA Controller.

Que -

1.

2.

4.


Explain Impact printer is detail.

Explain Asynchronous Data Transfer with help of handshaking signals.

Draw a memory address map for memory of 1024 Bytes RAM and 1024 Bytes ROM. You are having RAM block of 256 Bytes and ROM block of 512 Bytes.

Que - 5 Write short note on any Five.

[15]


1.    Hard Disk.

2.    Associative mapping in cache memory.

3.    Virtual Memory.

4.    Interrupt Initiated I/O.

5.    I/O Interface.

6.    Reverse Polish Notation.

7.    CPU - IOP Communication.

SX-7297]    2    [100]







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