Guru Nanak Dev University 2010-1st Year B.C.A Computer Application Principal of Digital Electronics , - Question Paper
Tuesday, 22 January 2013 02:10Web
(Theory)
Time Allowed : three Hours
Maximum Marks : 100
Note: Attempt any five ques. in all. All ques. carry equal marks.
1. Discuss different features of TTL, STTL and CMOS families and provide their transfer characteristics.[Marks 20]
2. (a) explain voltage divider biasing scheme.[Marks 10]
(b) discuss working of FETs.[Marks 10]
3. (a) Show that NAND gates are universal gates.[Marks 10]
(b) Design a half-adder using NAND gates only.[Marks 10]
4. discuss the working principle of any DAC converter.[Marks 20]
5. explain any microprocessor compatible ADC and its interfacing.[Marks 20]
6. explain 1 fault detecting and fault correcting code every.[Marks 20]
7. explain the address selection logic for a ROM chip. Draw learn and write control timing diagram. Compare PROM and EPROM.
[Marks 20]
8. explain the working and truth table of J-K flip-flop. provide its limitation and suggest any solution.[Marks 20]
Earning: Approval pending. |