Guru Jambheshwar University 2006 Post Graduate Diploma Computer Application pgdca - Question Paper
(First Semester)
(Re-appear)
MS-03
DIGITAL ELECTRONICS Time : 3 Hours Maximum Marks : 100
*
Note : Attempt any Five questions. All questions cany equal marks.
1* (a) Why NAND and NOR gates are known as universal gates ? How can we implement AND, OR, NOT gate using NAND and NOR gate ? 10
fcr JUN 2006(b) State and prove De'Morgan's theorem. 5
(c) Draw the truth table and logic diagram of EX-OR gate. 5
2. (a) Minimize the following expression using
K-map and realize with NAND gates.
/(A, B, C, D) Zih (1, 3, 7, 11, 15)
+ d (0, 2, 5)
10
(b) What is Multiplexer ? Draw the logic diagram of 4: 1 multiplexer with stroke input using NAND gates. 10
3. (a) What is Full Adder ? Draw the truth table
and logic diagram of full adder using NAND gates. 10
(b) Perform the following subtraction using 2's complement method : 10
(i) (110101)2 - (10010)2
(ii) (101101-101)2 - (10110*01)2
(iii) (100101)2 - (101101*10)2
(iv) (1001)2 - (101l)2
4. (a) Define IC. Discuss the characteristics of
digital IC's. 10
(b) Explain TTL logic family in detail. 10 J-4376-X 2
5. (a) Discuss briefly the role of CMOS inverter
and tristatc buffer in digital system. 10
(b) Draw the truth table and logic diagram of BCD to 7-segment decoder. 10
6. (a) Explain the race round problem in J-K
flip-flop. How can it be solved ? 10
(b) What is Shift Register ? Explain any one in detail. 10
7. Design a 3 bit synchronous binary UP/DOWN counter with a direction control M. Use J-K flip-flops. 20
8. (a) Explain the function of ROM chip in
digital computers. 8
(b) Draw the circuit of R-2R ladder type
D/A converter and explain its
operation. 12
J-4376-X 3 1,000
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| Earning: Approval pending. |
