Jaypee Institute of Information Technology (JIIT) 2008 B.E Electronics & Tele-Communication Engineering Test 3 : Analog IC Design - Question Paper

JAYPEE IMVERS1TV OK INFORMATION TKC IINOI.OGY,

WAKNAGHAT, SOI.AN

Brunch: E & C'    Semester: VII

Test: 3^rd    I>ate:2*Nov.'2Mi

Subject: Analog IC Design (Elective)    Max. Marks: 30

Subject Credit: 03 (08B71EC409)    Max. l ime: lhr.30min.

Attempt any 6 Questions. All arc or equal marks.

I. Calculate (A) r,i (B) Input Resistance Ri (C) Output Resistance Ro (D) Voltage gain of an Emitter Follower. Where po-100, rt,=0_t r₀->in(miic, lc*100nA, Ri*1KH, Rs=l K'Q.Draw the required figure.    (1*5)

2. Draw the small signal model for bipolar transistor and explain its capacitances.

(2+3)

3 Why Wilson current mirror of bipolar is used and how it works. Drive the

formula for its systematic gain error.    (1+2+2)

4.    Write short notes of MOS folded cascade configuration.    (5)

5.    Explain working of any ONE topic. (A) VCO, (13) Comparator    (5)