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Jaypee Institute of Information Technology (JIIT) 2008 B.E Electronics & Tele-Communication Engineering Test 3 : Microprocessor & Controller - Question Paper

Tuesday, 02 April 2013 06:55Web



Jaypee University of Information Technology'. Waknaghat

V Semester ECE T-3 Examination

Course Code: 07B41CI105    Max Time: IHr 30 Min

Course Name: Microprocessor and Controller    Max Marks: 30

Note: Attempt all questions.

a.    [25jExplain how address and data can be separated in 8086 system.

b.    |2.5)Explain the generation of OSC and PCLK outputs by 8284 clock generator. Where con these be used?

a. |2.5|Explain the implementation of 256 KB memory for 8086 using separate write strobe method

b [2.5|Explain the structure of PCI bus interface.

OR

(2.5) In 8051 main program will start at location 30H when interrupts arc used. Give

reasons why above 30H locations cant be used?

a.    (2.5 jExplain the Mode-0 operation of 82C55 PP1 with examples

b.    (2.5)Exptain with timing diagram mode-2 and mode-4 operation of 8254. Also mention where these modes we used.

a.    [2.5)Explain DMA operation using 8237 with 8086

b.    [2.5JAn 8086 microprocessor based embedded system handles more than one source of interrupts requests as given below.

i.    To service sequentially 8 interrupt requests occurring at different times.

ii.    To service more than one interrupt requests occurring at same time using only one interrupt vector.

iii.    To service 16 priority encoded interrupts requests.

Explain suitable method to handle these interrupt requests Also explain how to determine which output caused the interrupt?

a.    |2.5)Explain interface of modem to a PC with neat diagram

b.    |2.5|Detennine various 16550 (UART for 8086) errors from the data Information given below for transmission and receiving settings. Justify your answer by explain how the error has occurred.

Features

Transmitter side

Receiver Side

1

8 bit data with

1 stop bit having sticky parity bit enabled

IOIOIOIOIO

1010101000

2

Baud rate divisor value

120

60

3

FIFO

16 bytes of data is transmitted

4 bytes of FIFO is empty







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