Uttar Pradesh Technical University (UPTU) 2006 B.Tech Computer Science Information Technology GATE - Question Paper
Wednesday, 27 March 2013 07:45Web
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be serialized. A cache block access may involve multiple iterations of parallel bank accesses
depending on the amount of data found by accessing all the kbanks in parallel. every
iteration requires decoding the bank numbers to be accessed in parallel and this takes --ns.
The latency of 1 bank access is 80 ns. If c = two and k = 24, the latency of retrieving a cache
block starting at address zero from main memory is:
(A) 92 ns
(B) 104 ns
(C) 172 ns
(D) 184 ns
42. A CPU has a five-stage pipeline and runs at one GHz frequency. Instruction fetch happens in
the 1st stage of the pipeline. A conditional branch instruction computes the target address
and evaluates the condition in the 3rd stage of the pipeline. The processor stops fetching
new instructions subsequent a conditional branch until the branch result is known. A program
executes io instructions out of which 20% are conditional branches. If every instruction takes
one cycle to complete on average, the total execution time of the program is:
(A) 1.0 second
(B) 1.2 seconds
(C) 1.4 seconds
(D) 1.6 seconds
43. Consider a new instruction named branch-on-bit-set (mnemonic bbs). The instruction “bbs
reg, pos, label” jumps to tag if bit in position pos of register operand reg is one. A register is
32 bits wide and the bits are numbered 0 to 31, bit in position 0 being the lowest significant.
Consider the subsequent emulation of this instruction on a processor that does not have bbs
implemented.
temp — reg & mask
Branch to tag if temp is non-zero.
The variable temp is a temporary register. For accurate emulation, the variable mask must be
generated by
(A) mask —0x1<
(C) mask—pos
(D) mask —0xf
44. Station A uses 32 byte packets to transmit messages to Station B using a sliding window
protocol. The round trip delay ranging from A and B is 80 milliseconds and the bottleneck
bandwidth on the path ranging from A and B is 128 kbps. What is the optimal window size that A
should use?
(A) 20
(B) 40
(C) 160
(D) 320
45. 2 computers Cl and C2 are configured as follows. Cl has IP address
| Earning: Approval pending. |
