Dr Bhim Rao Ambedkar University 2006 B.Tech Information Technology Computer Organisation - Question Paper

Y-510
SECOND YEAR OF COMPUTER SCIENCE AND ENGINEERING (PART-2) EXAMINATION, 2005

COMPUTER ORGANIZATION

Day and Date: Monday, 30-05-2005 Total Marks: 100
Time: 10.00p.m. To 1.00p.m.

Instructions: 1) Q.1 from section-1 and Q.5 from section-2 are compulsory.

2) Solve any 2 ques. from Q.2, Q.3, and Q.4

3) Solve any 2 ques. from Q.6, Q.7, and Q.8

4) Figures to right shows full marks


SECTION-1


Q. one a) Illustrate the principle of restoring division technique.[Marks 5]

b) Compare the Risc and Cisc processors.[Marks 5]

c) Design a full adder using multiplexer circuit.[Marks 5]

d) discuss the M/M/1 model of queuing.[Marks 5]



Q. two a) provide the detail design and working of binary fixed point multiplier.Marks 10]


b) Draw a block schematic indicating the data processing part of a simple floating-point arithmetic unit.[Marks 5]



Q.3 a) discuss desirable features of an instruction .Also define the meaning of the term “completeness”.[Marks 8]

b) define the advantages of PLA what is meant by folded PLA and decoded PLA?[Marks 7]



Q.4 a) explains the algorithm for floating point multiplication and also provide the structure for realization of the floating point multiplication.[Marks 10]

b) Write a program to execute the statement:

X=A*B+C*C

In 1 address, 2 address and 3 address processor.[Marks 5]





SECTION-2



Q.5 a) discuss the working of microprogramming sequencer with help of neat diagram.[Marks 8]

b) discuss the operation of paged segmentation arrangement.[Marks 7]

c) describe programmed I/O. provide its advantages and disadvantages with respect to design complexity, I/O bandwidth and interface hardware costs.[Marks 5]



Q.6 a) with a suitable diagram, discuss non-preemptive allocation algorithm for main memory.[Marks 5]

b) A typical CPU allows most interrupt requests to be enabled and disabled under software control, in contrast, no CPU provides Facilities to disable DMA request signals. discuss why this is so.[Marks 5]

c) explain the design steps involved in design of hardwired control unit using delay element method. [Marks 5]



Q.7 Write a short note on: [Marks 15=5*3]

1) I/O processor

2) High speed memories

3) Paging



Q.8 a) provide the advantage and disadvantages of DMA operation.[Marks 5]

b) discuss the working of interleaved memory organization with the help of neat diagram. [Marks 6]

c) discuss how interrupts processing carried out in typical CPU.[Marks 4]

Earning:   Approval pending.