Dr Bhim Rao Ambedkar University 2005 B.Tech Information Technology Swithing theory and Logic Design - Question Paper

H-419
SECOND YEAR OF COMPUTER SCIENCE AND ENGINEERING (PART-1) EXAMINATION, 2005

SWITCHING THEORY AND LOGIC DESIGN
Total Marks: 100
Time: 2.30pm to 5.30pm

Instructions: 1) ques. no.1st and fifth are compulsory

2) Attempt any 2 ques. from every part

3) Figures to right indicate full marks.




SECTION-1


Q.1.a) Convert (859.42)16 to decimal and binary.[Marks 4]

b) Write a note on: [Marks 4]

1) D kind flip-flop

2) T kind flip-flop

c) discuss the learn operation of semiconductor memory.[Marks 4]

d) Compare minterm and maxterm.[Marks 4]

e) Design half adder using NAND gate.[Marks 4]


Q.2 a) discuss S-R flip- flop? How to overcome it?[Marks 8]

b) Implement 16*4 memories using 16*4 memory chips.[Marks 7]



Q.3 a) Prove the subsequent using Boolean algebraic theorems:[Marks 8]

1) A+AB+AB=A+B

2) A+ABC+BCA+DA+DA+AD= (A+B+D). (A+C+D)

b) discuss carry look ahead adder.[Marks 8]


Q.4 a) Minimize using K-map: [Marks 8]

F(A,B,C,D)=PI M(1,2,7,8,13,14)+d(0,5,9)

b) discuss standard SOP and pos form of: [Marks 7]

Y= (A+BC) (B+CA)


SECTION-2



Q.5 ans any four: [Marks 20=5*4]

a) What is modulus of counter? Draw mod=10 counter.

b) discuss use of state diagrams.

c) State applications of shift registers.

d) Implement subsequent expressions using suitable a MUX: f (a, b, c) =m (0, 4, 7)

e) provide design steps of digital circuits using MSI.



Q.6 a) Draw and discuss 4-bit shift register, using waveforms. [Marks 10]

b) Convert (ACE9)16 to decimal and then octal no. [Marks 5]



Q.7 Short notes (any three): [Marks 15=5*3]

a) UP/DOWN counter

b) Excess-3 codes

c) Priority generator

d) BCD to seven segment decoder

e) Cascading of counters


Q.8) a) with the help of block diagram discuss synchronous counter.[Marks 8]

b) discuss 7447 with the help of a diagram.[Marks 7]

Earning:   Approval pending.