Dr Bhim Rao Ambedkar University 2006 B.E Computer Science Swithing theory and Logic Design - Question Paper

Y-310
SECOND YEAR OF COMPUTER SCIENCE AND ENGINEERING (PART-1) EXAMINATION, 2007

SWITCHING THEORY AND LOGIC DESIGN

Total Marks: 100
Time: 3.00pm to 6.00pm

Instructions: 1) ques. no.1st and fifth are compulsory.

2) Attempt any 2 ques. from every part.

3) Figures to right indicate full marks.



SECTION-1

Q.1.A) what is universal gate? discuss NAND gate as a universal gate.[Marks 8]

B) Perform the subsequent conversions:[Marks 8]

1) (AGC.8)16= Hexadecimal to octal

2) (713)8 Octal to binary

3) (49.78)10 decimal to binary

4) (1111.11)2 binary to decimal

.2 a) minimize the equations using Boolean algebraic theorems and implement minimized equations using basic digital circuits A+AB+AB.[Marks 8]

b) Draw and discuss carry look ahead adder. [Marks 7]



Q.3 a) Write a truth table for S-R and J-K flip flop and show block schematics for every.[Marks 8]

b) Implement 16*4 memories using 16*4 memory chips.[Marks 8]

Q.4 a) Minimize using K-map: [Marks 8]

F(A,B,C,D)=PI M(1,2,7,8,13,14)+d(0,5,9)

b) discuss standard SOP and pos form of: [Marks 7]

Y= (A+BC) (B+CA)

SECTION-2



Q.5 ans any four: [Marks 20=5*4]

a) What is modulus of counter? Draw mod=10 counter.

b) discuss use of state diagrams.

c) State applications of shift registers.

d) Implement subsequent expressions using suitable a MUX: f (a, b, c) =m (0, 4, 7)

e) provide design steps of digital circuits using MSI.

Q.6 a) discuss with suitable algorithms subsequent conversions: [Marks 15]

1. Gray to Binary

2. Binary to BCD


Q.7 Solve the following:

1. (1234)10= (?)16 [Marks 4]

2. (567.B) 10= (?)10 [Marks 3]

3. (775)8= (?)10 [Marks 4]

4. (FED) 16= (?)10 [Marks 4]

Q.8) a) with the help of block diagram discuss synchronous counter.[Marks 8]

b) discuss 7447 with the help of a diagram.[Marks 7]

Earning:   Approval pending.