Birla Institute of Technology (BIT Mesra) 2006 COMPUTER ORGANIZATION

Birla Institute of Technology & Science, Pilani

Distance Learning Programmes Division

Second Semester 2006-2007



Mid-Semester Test

(EC-1 Regular)



Course No. : SS ZG516

Course Title : COMPUTER ORGANIZATION & SOFTWARE SYSTEMS

No. of Pages = 2

No. of ques. = five
Nature of examination : Closed Book

Weightage : 40%

Duration : two Hours

Date of examination : 04/02/2007 (AN)

Note:

1. Please follow all the Instructions to Candidates provided on the cover page of the ans book.

2. All parts of a ques. should be answered consecutively. every ans should begin from a fresh page.

3. Mobile phones and computers of any type should not be brought inside the exam hall.

4. Use of any unfair means will outcome in severe disciplinary action.



Q.1. Consider a memory system that uses a 32- bit address to address at the byte level, plus a cache memory that uses a 64-byte line size.

a) presume an associative cache and determine the following:

(i) Address format

(ii) Number of blocks in main memory

(iii) Number of addressable units

b) presume a 4-way Associative cache with a tag field in the address of nine bits and determine the following:

(i) Address format

(ii) Number of lines in a set

(iii) Number of lines in cache memory

c) If cache design is changed to 8-way Associative then what will be the address format?

d) Draw the block diagram to show how processor’s requests are interpreted in 4-way Associative cache design i.e. in (b). [4 + four + two + three = 13]



Q.2 (a) presume a stack-oriented processor that includes the stack operations PUSH and POP. Arithmetic operations automatically involve the top 1 or 2 stack elements. start with an empty stack. Show the stack elements after execution of every instruction.

PUSH 4

PUSH 7

PUSH 8

ADD

PUSH 10

SUB

MUL



Q.2 (b) A PC- relative mode branch instruction is stored in memory at address 62010 The branch is made to location 53010. The address field in the instruction is 10 bits long. What is the binary value in the instruction? [4 + three = 7]



Q.3 (a) provide reasons that the page size in a virtual memory system should be neither very small nor very large.



Q.3 (b) What is the difference ranging from internal fragmentation and external fragmentation? [4 + four = 8]



Q.4. Write the sequence of micro-operations needed for the provided bus structure to

(i) Add a immediate number NUM to the register R0

(ii) Add the contents of memory location NUM to register R0



[6]



Q.5 (a) A disk unit has 20 recording surfaces. It has a total of 14,000 cylinders. There is an avg. of 400 sectors per track and every sector contains 512 bytes of data. obtain the storage capacity of the disk unit. If disk rotates at a speed of 7200 rpm then what is the data transfer rate in bytes per second?



Q.5 (b) elaborate the common characteristics shared by all RAID levels? [3 + three = 6]





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Earning:   Approval pending.