Bhavnagar University 2007 B.Sc Computer Science PROGRAMMING in LOGIC DESIGN - Question Paper

PROGRAMMING in LOGIC DESIGN



Time: three hrs
Max Marks: 70

First ques. is Compulsory

ans any 4 from the remaining ques.

All ques. carry equal marks

ans all parts of any ques. at 1 place

1. a) provided that (79)10 = (142)b determine the value of b.
b) Rewrite the subsequent expression in a form that requires as few inversions as possible b'c + acd' +a'c +c(a+c)(a'+d')
c) Represent the function (x,y,z)=y using Kamangh Map.
d) discuss the behavior of the subsequent logic circuit with input A and output B
e) Realize an Inverter and Buffer using Half-Adder
f) discuss clearly how a Flip-Flop is used as a memory unit
g) Draw the waveforms for a 3-bit ripple down counter.

2. a) In a certain number system, X and Y are 2 successive digits. When written as XY, it is equal to 25 and when written as YX, it is equal to 31 in decimal system. obtain the base of the system Also obtain the values of X and Y.

b) Construct 1 of the fault detecting codes for single digit BCD numbers and Hexadecimal numbers.

3. Demonstrate, without using perfect induction, whether or not every of the subsequent is valid. a) (x+y) (x+y') (x’+y)(x'+y')=0 b) a'b+b'c+c'a=ab'+bc'+ca' c) ab+a'c+bcd = ab + a'c

b) Write the HDL description of the circuit specified by the subsequent Boolean functions:

x = A(CD+B) + BC'
y = (AB' + A'B)C + D')
z = [(A+B)(C'+D'B)]'

4. provided the function T (w,x,y,z) = S (1,3,4,5,7,8,9,11,14,15)
a) Use the K - map to determine the set of all prime implicants. Indicate specifically the essential ones. obtain 3 distinct minimal expressions for T.
b) presume that only unprimed variables are available. Construct a circuit which realizes T.

5. a) Design a combinational circuit that multiplies 2 2-bit numbers. a1ao and b1bo, to produce a 4-bit product c3c2c1c0. Use AND gates and half-adder.

b) Design a combinational circuit that has 4 inputs and 4 outputs. The output generates the 2;s complement of input binary number.

6. Design a sequential circuit specified by the state diagram provided beneath using T Flip-Flops.
-----DIAGRAM-----

b) Draw and discuss the logic diagram of a master-slave D flip-flop using NAND gates.

7. a) Design a synchronous BCD counter with JK flip-flops.

b) Design a shift register with parallel load that operates according to the subsequent function table:

Shift Load Register Operation
0 0 No change
0 one Load Parallel Data
1 X Shift Right

8. Write short notes on the subsequent
a) Programmable Array Logic b) Asynchronous Sequential Logic
c) HDL for registers and Counters d) D-latch and D-Flip-Flop

Earning:   Approval pending.