Anna University Chennai 2009 M.E Electronics and Control Engineering DSP Integrated Circuits - Question Paper

M.E DEGREE EXAMINATION,MAY/JUNE 2009
1st Semester
VL-1601 DSP Integreted Circuits


Part-A (10*2=20marks)
1.Differentiate ASIC and DSP chip.
2.Draw 2 input Cmos Nand Gate Model.
3.State Sampling Theorem.
4.Define Tuddile Factors for Radix-2 FFT.
5.List few applications of multirate systems.
6.Mention few advantages of multirate Operations in DSP Systems.
7.Draw Standard DSP Architecture.
8.What is Complex PE?
9.What are the Advantages of redundant number systems?
10.What is FFT processor?


Part-B (5*16=80marks)
11.a.Explain the Fabrication process of 2 input nand gate.
(or)
b.write short notes on the subsequent
i.recent patterns in CMOS technology
ii.ASIC for DSP system.

12.a.find DFT for the subsequent sequences and hence obtain X(5)
i.x(n)=(0.5) ^n n=0,1,2,3,4
=0 n=5,6,7,………..15.


ii.x(n)=1 n=0,1,2,3
=0 n=4,5,6,7
=0.5 n=8,……..15.


(or)
b.Draw the flow chart for FFT radix-2 DIT algorithm.
ii.find DCT for the sequence x(n)=(0.5)^n u(n).

13.a.Explain in detail the design procedure for Linear phase FIR filter Design
(or)
b.For the IIR filter H(z) ,realize in
i.Direct form I
ii. Direct form II
iii.Cascade Form
iv.Parallel Form.
H(z)=(z+1)² /(z²+5z+6)(z+0.5)


14.a.Explain the DSP Architecture system and Compare with Conventional µp system.
(or)
b.i.Discuss the Implementation of Complex PE into Hardware.
ii.What are the Benefits of Serial Adder Compound to Parallel Adder system.


15.a.Draw the Structure of Complex Muliplies of(4*4)bit and discuss the Working.
(or)
b.Write Short Notes on
i.DCT processor and its applications to DSP system.
ii.Number system(redundant)and its Implementation in DSP.

Earning:   Approval pending.