Anna University Chennai 2012-3rd Sem B.E Computer Science and Engineering ./B.Tech , /E (ester, )-DIGITAL PRINCIPLES AND SYSTEMS DESIGN - Question Paper
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B.E./B.Tech. DEGREE EXAMINATION, MAY/JUNE 2012.
Third Semester
Computer Science and Engineering
CS 2202/141302/CS 34/EC 1206 A/10144 CS 303/080230012-DIGITAL PRINCIPLES AND SYSTEMS DESIGN
(Common to info Technology)
(Regulation 2008)
Time : 3 hours
Maximum : 100 marks
ans all ques..
PART A-(10*2 = 20 marks)
1. Write the application of gray code.
2. The solution to the quadratic formula x^2-11x+22=0 is x=3 and x=6.
3. describe Tri-state gates.
4. describe Logic synthesis and simulation.
5. Write an HDL behavioral description of a 4-bit comparator with a 6-bit output y[5,0]. Bit five of y is for equal, bit four for unequal, bit three for greater than, bit two for less than, bit one for greater than or equal and bit 0 for less than or equal to.
6. Write the stimulus for 2-to-1 line mult6iplexer.
7. Write the characteristic tabl and formula of JK flipflop.
8. Write any 2 applications of shift register.
9. describe Race condition.
10. What is meant by essential hazards?
PART B-(5*16 = 80 marks)
11. (a) (i) describe prime implicant and essential prime implicant. [Marks 4]
(ii) Write the procedure for obtaining logic diagram with NAND gates from boolean function.[Marks 4]
(iii) Implement the switching function. [Marks 8]
F(x,y,z)=summation m(1,2,3,4,5,7) with NAND gates.
Or
(b) Minimise the exression using Quine McCluskey Tabulation) method
Y=ABCD+ABCD+ABCD+ABCD+ABCD+ABCD
12. (a) Design Half and Full substractor circuits.
Or
(b) Design a circuit that converts 8421 BCD code to Excess-3 code.
13. (a) Implement the subsequent function using PLA
A(x,y,z)=summation m(1,2,4,6)
B(x,y,z)=summation m(0,1,6,7)
c(x,y,z)=summation m(2,6)
Or
(b) Implement a full adder with 2 4*1 multiplexers.
14. (a) (i) Draw a 4-bit ripple counter with D flipflops. [Marks 6]
(ii) Write the HDL for the above circuit. [Marks 10]
Or
(b) Design the sequential circuit specified by the state diagram using JK flipflip.
15.(a) Design an asynchronous sequential circuit that has two inputs X2 and X1 and 1 output Z. When X1=0, the output Z is 0. The firstb change in X2 that occurs while X1 is one will reason output Z to be 1. The output Z will remain one until X1 returns to 0.
Or
(b) obtain a circuit that has no static hazards and implements the Boolean function F(A,B,C,D)=?m(1,3,5,7,8,9,14,15)
I
14. (b) The state diagram
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| Earning: Approval pending. |
