Jawaharlal Nehru Technological University Hyderabad 2005-1st Sem B.Tech Applied Electronics and Instrumentation IIISupplementary s, il/ - INDUSTRIAL ELECTRONICS - exam paper

Code No: RR312202 Set No.3
III B.Tech. I Semester Supplementary Examinations, May -2005
INDUSTRIAL ELECTRONICS
(Instrumentation & Control Engineering)
Time: three hours Max Marks: 80
ans any 5 ques.
All ques. carry equal marks
? ? ? ? ?
1. (a) elaborate Non-linear bias circuits? Why do we need this circuit?
(b) discuss any 1 Non-linear biasing circuit.
2. (a) Compare series and short voltage regulator circuits in all respects.
(b) Design a series voltage regulator with the subsequent specifications Vo=20volts,
Vin=22-30 volts, Iload(max)=50mA.
3. (a) How is short-circuit current protection given for an IC regulator? Draw
and discuss the circuit diagram.
(b) discuss voltage regulator system using LM 105 IC and with an external pass
transistor.
4. (a) List the advantages of thyristor as compared to BJT for switching applications.
(b) An SCR has a Vg -Ig characteristics provided as Vg = 1.5 + eight Ig . In a certain
application, the gate voltage consists of rectangular pulses of 12 V and of
duration 50microsec with the duty cycle 0.2. obtain the value of Rg series
resistor in gate circuit to limit the peak power dissipation in the gate to 5
watts. And also compute avg. power dissipation in the gate.
(c) describe the Nonrepetitive and Repetitive peak reverse and forward voltage
ratings of SCR.
5. discuss the operation of three-phase , half-wave controlled converter with resis-
tive load. Sketch the associated waveforms and derive expressions for the avg.
voltage output.
6. Draw and discuss the operation of the time-sharing inverter circuit and provide its
related current and voltage waveforms.
7. discuss the AC operated timer and draw its voltage and current waveforms.
8. (a) discuss the concept of pulsed echo ultrasonic flaw detector using its block
diagram.
(b) discuss the techniques of soldering and welding by ultrasonics.

Earning:   Approval pending.