Jawaharlal Nehru Technological University Hyderabad 2002 B.Tech Computer Science and Engineering gate - Question Paper

the Objective Response Sheet (ORS) against the corresponding sub-question
number using a soft HB pencil.
for any
Do not darken more than 1 bubble
sub-question. Do not use the ORS for any rough work. You may use the ans
book (last few pages) for any rough work.
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2.1 Consider the subsequent logic circuit whose inputs are functions f
, f
, f
and output
1
2
3
is f.
f
(x,y,z)
1
f(x,y,z)
f
(x,y,z)
2
f
(x,y,z)=?
3
provided that
ƒ
( ) ( )
f x y z
, , 0,1,3, five ,
=
1
ƒ
( ) ( )
f x y z
, , 6, seven , and
=
2
ƒ
( ) ( )
fx y z
, , 1, 4, five ,
=
f
is
3
ƒ
ƒ
( )
( )
(a)
(b)
1, 4, 5
6,7
ƒ
( )
(c)
(d) None of the above
0,1,3, 5
2.2 Consider the subsequent multiplexor where 10, 11, 12, 13 are 4 data input lines
opted by 2 address line combinations A1A0 =00,01,10,11 respectively and f
is the output of the multiplexor. EN is the Enable input.
10
4 TO 1
11
multiplexor
12
13
f(x,y,z)=?
OUTPUT
A1
A0
EN
The function f(x,y,z) implemented by the above circuit is
'
(a) xyz
(b) xy+z
(c) x+y (d) None of the above
( )
( )
' +
2.3 Let f(A,B) =
A B
Simplified expression for function
ffx y y z
+
, ,
is
.
' +
(a) x z
(b) xyz
(c) xy z
' +
(d) None of the above
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