Uttar Pradesh Technical University (UPTU) 2006 B.Tech Computer Science Information Technology GATE - Question Paper
Wednesday, 27 March 2013 07:45Web
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R *E{print(’*’);}Rs
E — F+E{print(+);}F
F — (S)id{print(id.value);}
Here Id is a token that represents an integer and id.value represents the corresponding
integer value. For an input 2*3+4,this translation scheme prints
(A) 2*3+4
(B) 2*+34
(C) two 3*4
(D) two three 4*
60. Consider the subsequent C code segment.
for (± — 0, i
x += (4*j + 5*±);
y += (7 + 4*j);
Which 1 of the subsequent is false?
(A) The code contains loop invariant calculation
(B) There is scope of common sub-expression elimination in this code
(C) There is scope of strength reduction in this code
(D) There is scope of dead code elimination in this code
61. The atomic fetch-and-set x, y instruction unconditionally sets the memory location x to 1
and fetches the old value of x n y without allowing any intervening access to the memory
location x. consider the subsequent implementation of P and V functions on a binary semaphore
S.
void P (binary_semaphore *s)
unsigned y;
unsigned * = &(s—>value);
do
fetch—and—set x, y;
while (y)
void V (binary_semaphore *s)
S—>value = 0;
Which 1 of the subsequent is true?
(A) The implementation may not work if situation switching is disabled in P
(B) Instead of using fetch-and —set, a pair of normal load/store can be used
(C) The implementation of V is wrong
(D) The code does not implement a binary semaphore
62. A CPU generates 32-bit virtual addresses. The page size is four KB. The processor has a
translation look-aside buffer (TLB) which can hold a total of 128 page table entries and is 4-
way set associative. The minimum size of the TLB tag is:
(A) 11 bits
(B) 13 bits
(C) 15 bits
(D) 20 bits
63. A computer system supports 32-bit virtual addresses as well as 32-bit physical addresses.
Since the virtual address space is of the identical size as the physical address space, the
operating system designers decide to get rid of the virtual memory entirely. Which 1 of the
subsequent is true?
(A) Efficient implementation of multi-user support is no longer possible
(B) The processor cache organization can be made more efficient now
| Earning: Approval pending. |
